We chose a SiC-MOSFET C3M0065090K from Wolfspeed as the high frequency switches and a IXFH80N65X2 from IXYS as the low frequency switches. In the paper, we will discuss a Totem pole architecture and design based on SiC MOSFETs, magnetic current sensing and CCM control. With the availability of fast switching wideband gap transistor SiC and GaN based power switches, which have minimal reverse recovery charge along with other advantages, Totem Pole PFC designs can now operate in CCM mode to provide higher efficiency and higher power. In addition, the peak current will be 2 times of a CCM PFC, which increases the difficulty of EMI filter design and efficiency optimization. When using a BCM PFC, the operation frequency varies widely. But both have challenges.Ī DCM PFC can only support low power applications. This means that the Totem Pole PFC can only work in DCM (Discontinuous Conduction Mode) or BCM (Boundary Conduction Mode) mode with traditional Si-MOSFET. (A DCDC boost converter provides output voltage higher than the input voltage.) For a synchronous-rectified boost, a big problem is reverse recovery charge of the MOSFET body-Diode if the converter works in CCM (Continuous Conduction Mode) condition. Why SiC-MOSFET is needed in Totem Pole PFC designĪs Figure 2 shows, Totem Pole PFC can be considered a synchronous-rectified boost DCDC converter. If you want more discussion then please refer to the other two posts here I've made on the topic: (1) TTL Inverter and also (2) TTL AND.Figure 1: a) Bridgeless PFC, b) Totem Pole PF Design consideration of Totem Pole PFC (Just look at the base current into \$Q_2\$.) And it can sink a fair amount of it, in fact. In this state, the output cannot source any current. Then verify that you also agree with me about the equivalent circuit on the right.
once again:įirst, look at the circuit on the left side and make sure that you agree with me about which BJTs are on and which are off. I've also included the equivalent resulting circuit on the right side.
I've added some details about how \$IN\$ is actually driven in a real circuit as well as a few short notes here and there, once again. Here is the schematic in the case where the output is LO. The drive will typically either be holding \$IN\$ close to ground (with output HI) so that \$Q_3\$ is OFF or else by sourcing a current of about \$700\:\mu\text\approx 12\$. The first thing to understand how the input (labeled \$IN\$ in the schematic) is actually driven. I've added the typical resistor values for TTL here, as well. Simulate this circuit – Schematic created using CircuitLab It's helpful to do so, despite having a "nice picture." If for no other reason, it allows others to quickly snap up and use your schematic as a starting point for adding additional notes.
Draw out the schematic using the existing schematic editor that you have access to when writing out your question.
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